This application claims the priority of German patent document 199 28 856.9, filed Jun. 24, 1999, the disclosure of which is expressly incorporated by reference herein.
The invention relates to an overload protection arrangement for an electric circuit, which is particularly suitable for use in an evaluation electronics unit for child-seat detection in a vehicle. The protection arrangement according to the invention includes a first and a second input connection for an input voltage signal, and a first and a second output connection for an output voltage signal. The first input connection and the first output connection are connected to one another by means of a first circuit path, and the source/drain path of a first field-effect transistor is included in a second circuit path from the second input connection to the second output connection in order to block the second circuit path if an overvoltage is present.
A circuit arrangement of this generic type is disclosed in German patent document DE 38 04 250 C1 for current limiting in digital telephone terminals which are supplied via the subscriber line. The gate potential of the field-effect transistor there is equivalent to the potential difference between the connections of a parallel circuit comprising a transistor and a capacitor in series with a resistor via the two input connections. On the one hand, this arrangement limits the maximum level of a current flowing between the input and output connections of the circuit, while on the other hand, voltage spikes in a signal applied to the two input connections are damped and transferred to the output connections.
Circuit arrangements for overload protection having zener diodes are also known. In these, the voltage between two input connections is limited by short-circuiting these input connections through zener diodes connected back to back. If a threshold voltage appropriate to the zener diodes is exceeded, a short-circuit current flows between the input connections, so that electrical power is primarily dissipated in the zener diodes, and not in the load connected to the output connections.
Overload protection is desirable, for example, in devices for child-seat detection in motor vehicles, such as described in German patent document DE 44 09 971 C2. Such devices usually comprise a transmission and reception unit, accommodated in a vehicle seat, with an inductive antenna which has an associated resonator located in the child seat. The resonator can be combined with an intelligent identification medium operated by the energy drawn by the resonator from the electromagnetic radiation field. Because the operating frequency range of 125 kHz frequently used for child-seat detection overlaps the frequency range for keyless-go systems, it is desirable, particularly for a resonator in the child seat and also for intelligent identification media that may be coupled thereto, to assure protection against overvoltages such as can be caused by a keyless-go system.
The circuit arrangement used for overload protection should, on the one hand, protect against excessively high powers picked up from an electromagnetic interference field; and on the other hand, it should not significantly reduce the sensitivity of the resonator and of the possibly associated identification medium in the child seat, at least in a normal operating range. This means that only a very low leakage-current loss should occur in a normal operating range. These requirements are not fulfilled unsatisfactorily by circuit overload protection arrangements based on zener diodes.
The object of the invention is to provide an improved circuit overload protection arrangement of the type mentioned above, which has a high input resistance and a correspondingly low leakage-current loss.
This and other objects and advantages are achieved by the circuit arrangement according to the invention, in which a third circuit path (between the first circuit path and that connection of the first field-effect transistor which is coupled to the second input connection) includes the source/drain path of a second field-effect transistor. The latter completes the third circuit path if an overvoltage is present between the first and the second input connection. The gate connection of the first field-effect transistor is connected to a potential in the first circuit path between the first input connection; and the first output connection, and the gate connection of the second field-effect transistor is connected to a potential in the second circuit path between the second output connection and that connection of the first field-effect transistor which is coupled to the second output connection. This produces an overload protection circuit in which, in a normal operating range, only a very small leakage current flows, which is significantly below that in an equivalent circuit based on zener diodes. In addition, the field-effect transistor in the circuit path between the second input connection and the second output connection causes the voltage between the output connections to be advantageously stabilized.
In one embodiment of the invention, the first field-effect transistor is a depletion-mode n-channel MOSFET or an n-channel field-effect transistor, and the second field-effect transistor is an enhancement-mode p-channel MOSFET. This permits a positive potential difference between the second and the first input connection to be limited to a positive threshold value.
In another embodiment of the invention, the first field-effect transistor is a depletion-mode p-channel MOS field-effect transistor or a p-channel field-effect transistor, and the second field-effect transistor is an enhancement-mode n-channel MOSFET. This permits a negative potential difference between the second and the first input connection to be limited to a negative threshold value, so that the potential difference on the output connections does not fall below this threshold value.
In still another embodiment of the invention, the source/drain path of a third field-effect transistor is connected in parallel with the second field-effect transistor. This short-circuits the first and the second input connection if an overvoltage is present, the gate potential of the third field-effect transistor being equivalent to the voltage drop for the current flowing through the second field-effect transistor across a resistor. This arrangement permits a potential difference between the output connections to be limited, when an overvoltage is present on the input connections, such that the short-circuit current between the input connections rises very steeply as a function of the voltage between the input connections if the voltage applied between the input connections enters an overvoltage range.
Finally, in a further embodiment of the invention, the circuit arrangement is integrated in an ASIC module. This achieves a robust and compact design for the circuit arrangement with a low space requirement.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.